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مجاهد شفيق عبد الرزاق مخللاتي

Associate Professor

قسم هندسة الحاسب

علوم الحاسب والمعلومات
Mujahedm@ksu.edu.sa
السيرة الذاتية

السيرة الذاتية

مختصر السيرة الذاتية
السيرة الذاتية للدكتور مجاهد مخللاتي
نص السيرة الذاتية
Dr Mejahed CHafiq MEKHALLALATI
SUMMARY
Accomplished associate professor in the field of Computer Engineering (Digital Systems Design), with around fifteen years of experience in the development, design, supervision and evaluation of digital systems/computer engineering courses for both undergraduate and postgraduate Programmes of studies. Extensive involvement in state-of-the-art educational research and in designing instructional materials. Skilled in writing high standard self-instructional educational materials. Strong, clear and effective communication skills. Successful understanding and application of accreditation bodies’ requirements for both academic standards and quality assurance in Higher Education. Demonstrated remarkable leadership in preparing a suite of study programmes documentation for accreditation purposes. Highly energetic with organized, dedicated, and focused work ethics.
 
Personal Information
  Marital status: Married
Nationality: British
Age: 52
Place of Birth: Hanover, Germany
Languages: Fluency in understanding, writing and speaking both Arabic, English.
Education & TRAINING
  1986 - 1991 College of Computer Science and Information, King Saud University, Riyadh, Saudi Arabia.
  • BSc in Computer Engineering (Final Year Project: The implementation of the 80286 System using HP PCBS-Grade awarded A)

1992 - 1997 Department of Electrical and Electronic Engineering, University of Nottingham, U.K.

  • PhD (first awarded) Thesis Title: Novel Multiplication Algorithms and Architectures. Thorough investigation of Computer Arithmetic algorithms and architectures for High Performance Computation. Developed novel systematic design techniques to satisfy designer requirements. Published several world-class journal papers out of the research undertaken.

1998-2001 Doulos HDL training Company, UK. Doulos is a world leader for independent know-how in leading edge methodologies for SoC, FPGA/CPLD and ASIC design.

  •  Successfully completed a suite of VHDL training courses:

-Comprehensive VHDL: 40 Hours training (1998).
-VHDL for Xilinx (Xilinx TechClass®): 24 Hours training (2000).
-Expert VHDL: 24 Hours training (2001).
 
1988-2004 Following my PhD in 1997 I became interested in Educational Management, where I completed three 60 credits courses (accumulating to 180 credits), making it equivalent to MA in Educational Management as follows:
1998 - 2000 School of Arts and Education, University of Derby. Derby, UK.

  • Post-Graduate Certificate in Professional Practice (PGCPP): Special emphasis was placed on the Higher Education Quality Assurance Agency HE-QAA requirements. Independent Project applied few educational theories aspects into the development of a digital system suite of courses. 

2003-2004 Institute of Educational Technology, The Open University, Melton Keynes, UK.

  • Post-Graduate Certificate in Educational Technology (PGCET): Course includes: Knowing your learners, learners needs, designing Programme/Courses specification, student support, managing quality in Higher Education. Learning, curriculum and assessment: curriculum and context; learner, learning and assessment; learning and knowledge; learning and pedagogy.

2004 Education, The Open University, Melton Keynes, UK.

  • Post-Graduate Certificate in Educational Management: Course includes: Managing pupils’ and students’ experience, Managing resources, Managing people, Managing external relations, Strategic management.
  •  
Work experience and Related
  1997 – 2004        University of Derby, United Kingdom
Lecturer(97-01)/Senior Lecturer (01-04) in Digital Systems Design
  • Supervised the development of a suite of Digital Systems modules for validation/accreditation purposes.
  • Originated, developed, evaluated and lead the following modules: Digital Electronics, Logic Design and Applications, Digital Communications Technology, VHDL for Programmable Logic, Digital Devices and Architectures (post-graduate module), Digital System Design (post-graduate module).
  • Developed few Digital Design short courses with hand-on experience for participants from Industry.
  • Obtained the highest grade in an assessed quality of teaching exercise by Higher Education Funding Council of England HEFCE.
  • Successfully obtained an EPSRC grant for: Development of a design methodology for high radix GF(2m) array processor suitable for FPGA implementation. (£53K grant over two years)
  • Serves as a regular referee for several periodicals in the field of Computer Arithmetic, Systolic Arrays, and Digital Circuits for crypto applications. RS codec and FPGA implementation, etc. (IEE Electronics Letters, IEE, IEEE Transactions and Conferences on Circuits).
  • Digital Systems Design Post-Graduate Programme Leader at the University of Derby, United Kingdom.
  • Served as a Programme Leader for the Foundation of Engineering at the University of Derby, UK.
  •  Serves as an external advisor for private educational institutions in the field of preparing documentations for academic quality assurance accreditation.
  • Guest speaker to Arab world academic institutions to introduce and discuss the Higher Education Quality Assurance Model in the United Kingdom. 
  • Extensive familiarity with the SARTOR3 and ABET accreditation requirements.
  • Supervised several MSc Projects in Digital Systems Design.
  • Serves as an examiner of for MSc's dissertations.

 
(2004- Present) King Saud University, Riyadh, Saudi Arabia

  • Associate Professor in the Computer Engineering Department, College of Computer Sciences and Information Systems.
  • Co-ordinator of the Quality Assurance Committee within the department.
   
 
   
publications
  [1] M. Mekhallalati and M. K. Ibrahim, "New Parallel multiplier design", Electronics Letters, pp. 1650-1651, 1992.
[2] M. Mekhallalati and A. Ashur, "Novel structures for serial multiplication over the finite field GF(2m)," Proc. Of the IEEE Workshop on VLSI Signal Processing, pp. 65-74, 1996.
[3] M. Mekhallalati et al, "Radix Modular Multiplication Algorithm", Journal of Circuits, Systems and Computers, pp. 547-567, 1996.
[4] M. Mekhallalati et al, "Novel Radix Finite Field Multiplier for GF(2m)," Journal of VLSI Signal Processing, No. 15, pp. 233-245, 1997.
[5] M. Mekhallalati et al, "New low complexity bi-directional systolic structures for serial multiplication over the finite field GF(qm)," IEE Proc. Circuits, Devices and Systems, pp. 55-60, 1998.
[6] M. Mekhallalati and M. K. Ibrahim, " New High Radix Maximally Redundant Signed Digit Adder", ISCAS99, Session 64.23.
[7] Hesham A. Al-Twaijry, Mejahed C. Mekhallalati, Hamid R. Abachi and Ghulam Muhammad, "A Rubrics Based Quality Improvement Methodology for ABET accreditation", International  journal of engineering education; Vol. 28, No. 6; pp. 1266-1273. 2012.