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Dr. Belgacem Ben Youssef

Associate Professor

Associate Professor

علوم الحاسب والمعلومات
bbenyoussef@KSU.EDU.SA
مادة دراسية

Logic Design II

This course provides students with advanced knowledge on synchronous sequential machines and basic knowledge in programmable logic devices including a hardware description language (Verilog). The course includes a lab component to help students get hands-on experience with the theoretical concepts they take in the course.

ملحقات المادة الدراسية