King Saud University

College of Engineering

Electrical Engineering Department

 

EE 208: Logic Design Second Semester 1429/1430

 

 

 

 

 

                        

Instructors:

 

                           Prof  Adnan  Nouh.   Dr. Abdullah Alsuwailem           Dr. Reda Jemal           

                           Office: 2C32             Office:  2C10                               Office: 2C 20/A

                           Phone: 4676817        Phone: 4676803                           Phone : 4676804

        E.mail:    asnouh@ksu.edu.sa     suwailem@ksu.edu.sa            rdjemal@ksu.edu.sa

 

 

Textbook:   “Digital Design” by M. Morris Mano, 3^rd.  Published by Prentice-Hall.

 

Course outline:

 

Topic	Chapters
Number Systems.	1
Boolean Algebra & Logic gates.	2
Boolean Functions Simplification.	3
Combinational Logic Circuits.	4
MSI & PLD Components.	5
Sequential Circuits.	6
Registers, Counters & Memory Unit.	7

 

Evaluation:

                        20%    Quizes & Tutorial.

                        40%    Two midterm Exams.

                        40%    Final Exam.

 

Midterm Exams:

 

                       1^st Midterm:    Saturday  28 / 3 / 1429 H     (Evening)                 

                       2^nd Midterm:   Saturday  19  / 5 / 1429 H    (Evening)                                                                                                                                                 

 

Attendance Policy:

According to KSU policy, every student should attend at least 75% of the course classes (including the tutorials). Those who fail to fulfill this condition will fail in the course.

  

Course organization

 

• Week no. 1(Ch.1)

 

1-1             Introduction to Digital systems.

1-2             Binary Numbers.

 

• Week no. 2(Ch.1) :

 

                        1-3      Number Base Conversions ( Integer & Fraction ).

1-4      Octal & Hexadecimal  Numbers.

1-3             Arithmetic operations in bases ( ADD, SUB and MULT  ).

1-5      1,s and 2,s Complement.

1-7              Binary codes ( BCD  ).

1-9       Logic gates.

 

                                             ( Home Work  no.1)

      Problems in Ch1: 1,3,4,8,9,10,12,16,18

 

• Week no. 3 (Ch2) :

2-1             Basic definitions.

2-2             Boolean Algebra.

2-3             Boolean algebra theorems.

2-4             Boolean functions and truth tables.

 

• Week no. 4 (Ch.2) :

2-5             Canonical and Standard forms.

2-6             Logic Operations.

2-7             Digital logic gates.

 

 

                                         ( Home Work  no.2)

Problems in Ch2: 1,2,3,4,5,6,8,10,11,12,14,15,16,17,18,20

 

• Week no. 5 (Ch.3):

 

3-1              Map method.

3-2              4 variables map.

3-3              5 variables map.

3-4              Product of sums simplification.

3-5              Don’t-care conditions.

                                      

• Week no. 6 (Ch.3) :

 

3-6              NAND and NOR implementation.

3-8       XOR Function.

 

                                         ( Home Work  no.3)

 

               Problems in Ch3: 1,2,3,5,6,7,8,9,10,11,12,13,15,16,17,18,19,23,24.

                                 

• Week no. 7 & 8 (Ch.4) :

 

4-1              Combinational circuits.

4-2              Analysis procedure.

4-3              Design Procedures.

4-4              Binary Adder- Subtractor.

4-6       Binary  Multiplier.

4-7              Magnitude Comparator.

4-8              Decoders.

4-9              Encoders.

4-10          Multiplexers

 

                                                        ( Home Work  no.4) 

       Problems in Ch4: 1,2,3,4,5,6,9,10,11,12,13,21,23,24,25,26,

                               27,28,31,32,33,34,35 

• Week no. 9 (Ch.7) :

 

7-1                Introduction.

7-5                Read Only Memory.

                         7-6        Programmable Logic Array.

 

( Home Work  no.5)

Problems in Ch7: 1,2,3,,6,8,15,16,17,18,19

 

• Week no. 10 & 11 (Ch.5) :

 

5-1                Sequential circuits.

5-2                Latches.

5-3                Flip Flops.

5-4                Analysis of clocked sequential circuits.

                       5-7        Design Procedure.

 

                                                  ( Home Work  no.6)

                             Problems in Ch5: 2,3,6,7,8,9,11,15,16,18,19,20

 

• Week no. 12 & 13 (Ch.6) :

 

6-1                  Registers.

6-2                  Shift Registers.

6-3                  Ripple Counters.

6-4                  Synchronous Counters.

6-5                  Other Counters ( Non Binary ).

Applications of Counters ( Digital Clock….etc. )

 

( Home Work  no.7)

                               Problems in Ch6: 4,11,12,13,14,16,17,18,19,24,26,27,28